This
is interesting, but we need to note the following.
This result is not at
all intuitive.
The circuit is symmetric.
If we have symmetric inputs
(X = 1, Y = 1), we should have symmetric outputs.
Instead, we seem to have
shown that P = 1 and Q = 0. That's not at all symmetric, and it it
bothersome.
We got to the result by
making an unsymmetrical assumption. We assumed P = 1.
What
if we made the opposite assumption? Let's assume P = 0.
If P = 0, then Q = 1 since
P is an input to the bottom NAND gate.
If we know that Q = 1,
it is an input to the top NAND gate, so the output there is P = 0
since the other input to the top gate, X, is also 1.
But, P = 0 is what we
assumed to start all this. Again, we do not get a contradiction,
so everything seems OK.
Here is the truth table
for this situation.
X
Y
P
Q
0
0
1
1
0
1
1
0
1
0
0
1
1
1
0
1
Now,
we can't have it both ways. This truth table summarizes what we have
found.
X
Y
P
Q
0
0
1
1
0
1
1
0
1
0
0
1
1
1
There's something decidedly peculiar here. The output has to be one
or the other of these two cases. Which is it?
But, there's a related question.
When you were little and
went to the playground, when you walked up to the see-saw, which direction
did the see-saw tilt? Or did you call it a teeter-totter?
Like the see-saw/teeter-totter,
this circuit depends upon what went on before.
It can exist in either
state. The see-saw can tilt in either direction. Which state
you find depends upon history.
This circuit has a name
with that same-consonant-different-vowel property. It's called a
flip-flop.
Now,
let's imagine that we do the following.
Let us assume that we
input X = 1 and Y = 0. Then, the output will be P = 0, Q = 1.
Here is the flip-flop in that state
Then, consider what happens
when Y changes from 0 to 1. Since P = 0, Q will not change when Y
changes. It only takes one zero input to keep the output of a NAND
gate at one. That means that the output does not change when Y changes
to 1.
We
can reverse the initial inputs.
Let us assume that we
input X = 0 and Y = 1. Then, the output will be P = 1, Q = 0.
Here is the flip-flop in that state
Now, consider what happens
when X changes from 1 to 0. Since Q = 0, P will not change when X
changes. It only takes one zero input to keep the output of a NAND
gate at one. That means that the output does not change when X changes
to 1.
Some
observations:
This circuit is a prototype
of a memory element. It can store and remember one bit of information.
Before it's a good memory
element, it will need a little work.
The method we used to
determine possible states in the flip-flop, including especially the case
of inputs with two possible stable states, is the method of contradiction.
Here's a simulation of the basic flip-flop. Check out the truth table
for the circuit and be sure that you understand how it works. There
will be a question or two after the simulation.
Simulation
Here is a simulation of a basic flip-flop circuit build using NAND gates.
Experiment with this circuit, checking out the truth table, and be sure
to focus on the situation where two different states can exits. In
the simulation, you can change the state of each switch by clicking on
the adjacent buttons.
Moving
Toward A One-Bit Memory Element - Making the Flip-Flop Useful
We're going to add some circuitry to our flip-flop to make it more usable.
Here is another simulation with a bit more circuitry. We'll work
toward understanding that circuitry shortly.
Simulation
Here is a simulation of a more complex flip-flop. In this flip-flop,
do the following.
Set the data you want
to store in the flip-flop. The data input is at the left in the circuit.
There's only one bit in the data.
Pulse the clock high for
a short time, and then reset it to low.
Notice that the data can
change. (Try changing it yourself.) However, the data that
is stored in the flip-flop (which is the data you see at the output) is
the data that was present when the clock cycled high. After that
you can change the data till the cows come home and the output won't change
until the next time you cycle the clock high.
If we look at the simulation above, we see that the circuit takes a data
input bit and transfers it to the output when the clock goes through a
cycle - from 0 to 1 and back to zero. After the clock pulse becomes
zero, then the output is held - i.e. remembered - until another clock pulse
comes along and reads the value of A then into the circuit.
Exercise
Try it again to be sure that you understand it. Make the data input
a 1 and store it, then make the data input a 0 and store it.
Well, so far we have a one-stage memory storage device. Next, we're
going to duplicate this single stage and have it drive a second stage.
There's a good reason for that. In this circuit we might end up trying
to change the output at the same time we are trying to read the output.
That would never do, so we're going to devise a circuit that will hold
the output constant in a second stage while we put the input into the first
stage. However, if we draw all of the components we won't be able
to show the whole thing. So, we going to encapsulate the entire circuit
above with just the data input, the clock input and the top output showing.
Note, we only need to have one output available since the two outputs of
the flip-flop are always complements.
You should also be aware that engineers really like to be able to use higher
order abstractions for devices. The logic gates (NAND gates in the
flip-flop) are really composed of transistors, and the flip-flops are really
composed of gates. But, you can't always work at the transistor level
when you are constructing circuits with gates, and you, similarly, can't
always work at the gate level when you are constructing circuits with flip-flops.
Now, working with the simpler representataion,
experiment with it to be sure that you understand how it works, and in
particular be sure that you can see that this device stores a single bit.
Exercise
Now, at this level of abstraction,
we can check out the operation of the single stage flip-flop. Run
this simulation and notice how the output changes on the leading edge of
the clock pulse, C.
There's a problem with this memory element. If this element is embedded
in a system in which you want to read new information into the memory element
at the same time as you are reading information from the element, those
two things are happening at the same time. A more desirable situation
would be to have a circuit in which the output was guaranteed to stay constant
while the input is being loaded. A two-stage memory element is used
for that. Here is a simulation. In this simulation, note the
following.
There are really two flip-flops
in this circuit, but there is only one clock and one data input.
The clock is used to put
the data into the first flip-flop (when it becomes "1"), but when the clock
becomes "0", the not-clock (the inverted clock signal) becomes "1", and
puts the data (now at the output of the first flip-flop) into the second
flip-flop.
Actually, we would normally
say that the data is gated into the first flop-flop on the leading edge
of the clock pulse, and then gated into the second flip-flop on the trailing
edge of the clock pulse.
Exercise
The
D Flip-Flop - A One-Bit Memory Element
The combination of two flip-flops constitutes a D-type flip-flop.
That's D because the output of the flip-flop is delayed by the time of
one clock pulse. Check it out. Set a value for the data and
pulse the clock ON and OFF. You'll find a copy of the data appearing
at the output on the trailing edge of the clock pulse. Now, if we
consider the combination of two flip-flops (in the simulation above) as
a unit, we have a D flip-flop. It's called a D flip-flop because
it delays the signal. The signal appears at the output of the circuit
delayed by the time of one clock pulse. Here's another simulation
to demonstrate that. The "blue box" (We don't always use the traditional
"black box".) is the D flip-flop.
Simulation - D (Delay) Flip-Flop
In this simulation, the data input appears at the output of the circuit
one clock cycle later. You can cycle the clock "manually".
The
Toggle (T) Flip-Flop
A D flip-flop can be converted to a toggle (T) flip-flop by connecting
the output to the input, inverting the output as it is fed back.
That's shown in the simulation below. Again, you can put a clock
pulse into the circuit.
Simulation - T (Toggle) Flip-Flop
In this simulation, the D flip-flop is transformed into a toggle flip-flop
using inverted feedback around the D flip-flop.
Question
Q1
If you go through four clock cycles (i.e. the clock goes from zero to one
and back to zero - that's one cycle), how many cycles does the output of
the toggle flip-flop go through?
The toggle flip-flop is a frequency divider when you use it as it was used
in the simulation above. If the clock runs 100 times a second, the
output of the toggle will be a pulse that runs 50 times a second, so the
frequency of the toggle output is half of the frequency of the toggle input.
Now, consider a "What if?" question. Here's the question. What
if you take two toggle flip-flops and put the output of one into the input
of the other. The next simulation will let you explore that.
Simulation
Here is the simulation for two T (Toggle) flip-flops with the output of
the first one being the input to the second one.
Questions
Using the simulation above with two T flip-flops, determine the answers
to the following questions. In answering these question, interpret
the LED indicators on the flip-flops as a two-bit digital number.
The most significant bit (MSB)
is the one on the right.
The LSB is the
one on the left.
Q2
When the simulation loads, what number is pre-loaded into the system?
Q3
After one clock cycle (clock becomes one, then becomes zero again, i.e.
two mouse clicks), what number is present?
Flip-flops are interesting circuits, and it is important that you understand
them. The best way to get to really know them is to use them in the
lab. You may have done that before you took this lesson depending
on your instructor. However, the lab is worthwhile whenever you do
it. There is a link below in the link to Logic Laboratories.
