OneStopGate.Com
OnestopGate   OnestopGate
   Saturday, December 21, 2024 Login  
OnestopGate
Home | Overview | Syllabus | Tutorials | FAQs | Downloads | Recommended Websites | Advertise | Payments | Contact Us | Forum
OneStopGate

GATE Resources
Gate Articles
Gate Books
Gate Colleges 
Gate Downloads 
Gate Faqs
Gate Jobs
Gate News 
Gate Sample Papers
Training Institutes

GATE Overview
Overview
GATE Eligibility
Structure Of GATE
GATE Coaching Centers
Colleges Providing M.Tech/M.E.
GATE Score
GATE Results
PG with Scholarships
Article On GATE
Admission Process For M.Tech/ MCP-PhD
GATE Topper 2012-13
GATE Forum




GATE 2025 Exclusive
Organizing Institute
Important Dates
How to Apply
Discipline Codes
GATE 2025 Exam Structure

GATE 2025 Syllabus
Aerospace Engg..
Agricultural Engg..
Architecture and Planning
Chemical Engg..
Chemistry
Civil Engg..
Computer Science / IT
Electronics & Communication Engg..
Electrical Engg..
Engineering Sciences
Geology and Geophysics
Instrumentation Engineering
Life Sciences
Mathematics
Mechanical Engg..
Metallurgical Engg..
Mining Engg..
Physics
Production & Industrial Engg..
Pharmaceutical Sciences
Textile Engineering and Fibre Science

GATE Study Material
Aerospace Engg..
Agricultural Engg..
Chemical Engg..
Chemistry
Civil Engg..
Computer Science / IT
Electronics & Communication Engg..
Electrical Engg..
Engineering Sciences
Instrumentation Engg..
Life Sciences
Mathematics
Mechanical Engg..
Physics
Pharmaceutical Sciences
Textile Engineering  and Fibre Science

GATE Preparation
GATE Pattern
GATE Tips N Tricks
Compare Evaluation
Sample Papers 
Gate Downloads 
Experts View

CEED 2013
CEED Exams
Eligibility
Application Forms
Important Dates
Contact Address
Examination Centres
CEED Sample Papers

Discuss GATE
GATE Forum
Exam Cities
Contact Details
Bank Details

Miscellaneous
Advertisment
Contact Us


Home » GATE Study Material » Instrumentation Engineering » Basics Ciruits » Circuit Analysis Technique

Circuit Analysis Technique

Looking for GATE Preparation Material? Join & Get here now!

** Gate 2013 Question Papers.. ** CEED 2013 Results.. ** Gate 2013 Question Papers With Solutions.. ** GATE 2013 CUT-OFFs.. ** GATE 2013 Results.. **

Circuit Analysis Technique

Circuit Analysis Techniques

Fundamentals

Ohm's Law states the voltage across a resistor, R (or impedance, Z) is directly proportional to the current passing through it (the resistance/impedance is the proportionality constant)

V=IR or V=IZ

Kirchhoff's Voltage Law (KVL): the algebraic sum of the voltages around any loop of N elements is zero (like pressure drops through a closed pipe loop)

KVL equation

Kirchhoff's Current Law (KCL): the algebraic sum of the currents entering any node is zero, i.e., sum of currents entering equals sum of currents leaving (like mass flow at a junction in a pipe)

KCL equation


Nodal Analysis

Nodal analysis is generally best in the case of several voltage sources. In nodal analysis, the variables (unknowns) are the "node voltages."

Nodal Analysis Procedure:

  1. Label the N node voltages. The node voltages are defined positive with respect to a common point (i.e., the reference node) in the circuit generally designated as the ground (V = 0).
  2. Apply KCL at each node in terms of node voltages.
    1. Use KCL to write a current balance at N-1 of the N nodes of the circuit using assumed current directions, as necessary. This will create N-1 linearly independent equations.
    2. Take advantage of supernodes, which create constraint equations. For circuits containing independent voltage sources, a supernode is generally used when two nodes of interest are separated by a voltage source instead of a resistor or current source. Since the current (i) is unknown through the voltage source, this extra constraint equation is needed.
    3. Compute the currents based on voltage differences between nodes. Each resistive element in the circuit is connected between two nodes; the current in this branch is obtained via Ohm's Law where Vm is the positive side and current flows from node m to n (that is, I is m --> n).

    Nodal Analysis Equation

  3. Determine the unknown node voltages; that is, solve the N-1 simultaneous equations for the unknowns, for example using Gaussian elimination or matrix solution methods.
Nodal Analysis Example
Nodal Analysis Example Circuit
  1. Label the nodal voltages.
  2. Apply KCL.
    1. KCL at top node gives IS = IL + IC
    2. Supernode constraint eq. of VL = VS
    3. Nodal Example Equation
  3. Solve for VT for instance.

Loop or Mesh Analysis

Mesh (loop) analysis is generally best in the case of several current sources. In loop analysis, the unknowns are the loop currents. Mesh analysis means that we choose loops that have no loops inside them.

Loop Analysis Procedure:

  1. Label each of the loop/mesh currents.
  2. Apply KVL to loops/meshes to form equations with current variables.
    1. For N independent loops, we may write N total equations using KVL around each loop. Loop currents are those currents flowing in a loop; they are used to define branch currents.
    2. Current sources provide constraint equations.
  3. Solve the equations to determine the user defined loop currents.
Mesh Analysis Example:
Mesh Analysis Example Circuit
  1. Label mesh currents.
  2. Apply KVL.
    1. Left loop KVL:
    2. VS = R1I1 + R2(I1-I2)
    3. Constraint equation I2 = -IS.
  3. Solve for I1 and I2. Note: Branch current from mesh currents: IM = I1 - I2

Superposition

In any linear circuit containing multiple independent sources, the current or voltage at any point in the network may be calculated as the algebraic sum of the individual contributions of each source acting alone.

Procedure:

  1. For each independent voltage and current source (repeat the following):
    1. Replace the other independent voltage sources with a short circuit (i.e., v = 0).
    2. Replace the other independent current sources with an open circuit (i.e., i = 0).
    3. Note: Dependent sources are not changed!
    4. Calculate the contribution of this particular voltage or current source to the desired output parameter.
  2. Algebraically sum the individual contributions (current and/or voltage) from each independent source.

Source Transformation

An ac voltage source V in series with an impedance Z can be replaced with an ac current source of value I=V/Z in parallel with the impedance Z.
An ac current source I in parallel with an impedance Z can be replaced with an ac voltage source of value V=IZ in series with the impedance Z.

Likewise, a dc voltage source V in series with a resistor R can be replaced with a dc current source of value i = v/R in parallel with the resistor R; and vice versa.

Source Transformation


Th�venin's and Norton's Theorems

Th�venin's Theorem states that we can replace entire network, exclusive of the load, by an equivalent circuit that contains only an independent voltage source in series with an impedance (resistance) such that the current-voltage relationship at the load is unchanged.

Norton's Thereom is identical to Th�venin's Theorem except that the equivalent circuit is an independent current source in parallel with an impedance (resistor). Hence, the Norton equivalent circuit is a source transformation of the Th�venin equivalent circuit.

Th�venin Equivalent Circuit Norton Equivalent Circuit
Thevenin
Norton

Procedure:

  1. Pick a good breaking point in the circuit (cannot split a dependent source and its control variable).
  2. Thevenin: Compute the open circuit voltage, VOC.
    Norton: Compute the short circuit current, ISC.
  3. Compute the Thevenin equivalent resistance, RTh (or impedance, ZTh).
    1. If there are only independent sources, then short circuit all the voltage sources and open circuit the current sources (just like superposition).
    2. If there are only dependent sources, then must use a test voltage or current source in order to calculate RTh= vTest/iTest (or ZTh=VTest/ITest).
    3. If there are both independent and dependent sources, then compute RTh (or ZTh) from RTh= vOC/iSC (or ZTh=VOC/ISC).
  4. Replace circuit with Thevenin/Norton equivalent.
    Thevenin: VOC in series with RTh (or ZTh).
    Norton: ISC in parallel with RTh (or ZTh).
  5. Note: for 3(b) the equivalent network is merely RTh (or ZTh), that is, no current or voltage sources.



Discussion Center

Discuss/
Query

Papers/
Syllabus

Feedback/
Suggestion

Yahoo
Groups

Sirfdosti
Groups

Contact
Us

MEMBERS LOGIN
  
Email ID:
Password:

  Forgot Password?
 New User? Register!

INTERVIEW EBOOK
Get 9,000+ Interview Questions & Answers in an eBook. Interview Question & Answer Guide
  • 9,000+ Interview Questions
  • All Questions Answered
  • 5 FREE Bonuses
  • Free Upgrades
GATE RESOURCES
 
  • Gate Books
  • Training Institutes
  • Gate FAQs
  • GATE BOOKS
     
  • Mechanical Engineeering Books
  • Robotics Automations Engineering Books
  • Civil Engineering Books
  • Chemical Engineering Books
  • Environmental Engineering Books
  • Electrical Engineering Books
  • Electronics Engineering Books
  • Information Technology Books
  • Software Engineering Books
  • GATE Preparation Books
  • Exciting Offers



    GATE Exam, Gate 2009, Gate Papers, Gate Preparation & Related Pages


    GATE Overview | GATE Eligibility | Structure Of GATE | GATE Training Institutes | Colleges Providing M.Tech/M.E. | GATE Score | GATE Results | PG with Scholarships | Article On GATE | GATE Forum | GATE 2009 Exclusive | GATE 2009 Syllabus | GATE Organizing Institute | Important Dates for GATE Exam | How to Apply for GATE | Discipline / Branch Codes | GATE Syllabus for Aerospace Engineering | GATE Syllabus for Agricultural Engineering | GATE Syllabus for Architecture and Planning | GATE Syllabus for Chemical Engineering | GATE Syllabus for Chemistry | GATE Syllabus for Civil Engineering | GATE Syllabus for Computer Science / IT | GATE Syllabus for Electronics and Communication Engineering | GATE Syllabus for Engineering Sciences | GATE Syllabus for Geology and Geophysics | GATE Syllabus for Instrumentation Engineering | GATE Syllabus for Life Sciences | GATE Syllabus for Mathematics | GATE Syllabus for Mechanical Engineering | GATE Syllabus for Metallurgical Engineering | GATE Syllabus for Mining Engineering | GATE Syllabus for Physics | GATE Syllabus for Production and Industrial Engineering | GATE Syllabus for Pharmaceutical Sciences | GATE Syllabus for Textile Engineering and Fibre Science | GATE Preparation | GATE Pattern | GATE Tips & Tricks | GATE Compare Evaluation | GATE Sample Papers | GATE Downloads | Experts View on GATE | CEED 2009 | CEED 2009 Exam | Eligibility for CEED Exam | Application forms of CEED Exam | Important Dates of CEED Exam | Contact Address for CEED Exam | CEED Examination Centres | CEED Sample Papers | Discuss GATE | GATE Forum of OneStopGATE.com | GATE Exam Cities | Contact Details for GATE | Bank Details for GATE | GATE Miscellaneous Info | GATE FAQs | Advertisement on GATE | Contact Us on OneStopGATE |
    Copyright © 2024. One Stop Gate.com. All rights reserved Testimonials |Link To Us |Sitemap |Privacy Policy | Terms and Conditions|About Us
    Our Portals : Academic Tutorials | Best eBooksworld | Beyond Stats | City Details | Interview Questions | India Job Forum | Excellent Mobiles | Free Bangalore | Give Me The Code | Gog Logo | Free Classifieds | Jobs Assist | Interview Questions | One Stop FAQs | One Stop GATE | One Stop GRE | One Stop IAS | One Stop MBA | One Stop SAP | One Stop Testing | Web Hosting | Quick Site Kit | Sirf Dosti | Source Codes World | Tasty Food | Tech Archive | Software Testing Interview Questions | Free Online Exams | The Galz | Top Masala | Vyom | Vyom eBooks | Vyom International | Vyom Links | Vyoms | Vyom World
    C Interview Questions | C++ Interview Questions | Send Free SMS | Placement Papers | SMS Jokes | Cool Forwards | Romantic Shayari